Analog layout batch starting on 12th August 2019, entrance exam on July 6, 2019.      Embedded training starting on August 5, 2019 in Pune, entrance exam on June 29, 2019

Embedded Design

HOME > Embedded Systems

Embedded Systems

M-ISS is offering world class industry oriented Embedded Systems training program

VLSI - Physical Design Training

Prerequisites:

B.E/B.Tech in ECE/EEE, M.E/M.Tech/M.S in VLSI/Embedded Systems/Digital Electronics; Percentage - above 60%

Admission Test Syllabus:

Need to qualify the screening test and technical interview.Test would be conducted in Basics of C programming, Assembly Language, Micro-processor & Micro-contoller Electronics - BJT, FET, CMOS; Digital Electronics - Number Systems, Boolean Algebra, K-Maps, Logic Gates, Logic Families, Combinational Circuits, Sequential Circuits and Counters. (All are subjective type questions)

Course content:

Practical C,Linux Internals,Networking and TCP/IP Application,Socket Programming,Object Oriented Programming with C++,Microcontroller INTEL - 8051,Introduction,Overview of Architecture of 8051,Programming concept,On-Chip Peripherals,External Interfaces,Protocols,ARM,RTOD RT-Linux,IOT on Raspberry Pi.

Embedded Systems

Prerequisites:

B.E/B.Tech in ECE/EEE, M.E/M.Tech/M.S in VLSI/Embedded Systems/Digital Electronics; Percentage - 60% & Above

Admission Test Syllabus:

Need to qualify the screening test and technical interview.Test would be conducted in Basics of C programming, Assembly Language, Micro-processor & Micro-contoller Electronics - BJT, FET, CMOS; Digital Electronics - Number Systems, Boolean Algebra, K-Maps, Logic Gates, Logic Families, Combinational Circuits, Sequential Circuits and Counters. (All are subjective type questions)

Course content:

Practical C, linux internals, networking and TCP/IP Application, socket programming, object oriented programming with C++, microcontroller intel- 8051 Low level programming concepts middle level programming concepts,On-Chip peripherals,External Interfaces,Protocols,ARM, RTOS RT- Linux, IOT on raspberry pi,.

VLSI - Analog Layout Training

Prerequisites:

B.E/B.Tech in ECE/EEE, M.E/M.Tech/M.S in VLSI/Embedded Systems/Digital Electronics;

Admission Test Syllabus:

Need to qualify the screening test and technical interview.Test would be conducted in Basic Electronics - BJT, FET, CMOS; Digital Electronics - Number Systems, Boolean Algebra, K-Maps, Logic Gates, Logic Families, Combinational Circuits, Sequential Circuits and Counters. (All are subjective type questions)

Course content:

Fundamental concepts in MOSFET fundamentals, Second order effects, Digital logic gates, Fabrication concepts, Latch Up, Analog building blocks, Analog layout concepts like Module based floor plan techniques, Device Matching techniques, Routing techniques (Power, Signal), Shielding concepts, Deep sub-micron process challenges like Well proximity, LOD and STI effects, ESD concepts and Layout guidelines. Physical verification concepts like LVS, DRC and Antenna with Parasitic extraction. Exposure to the Importance of reliability checks like EMIR analysis, DFM checks and ESD path checks. The trainees get to work on 5 to 6 different designs. The assignments are designed in such a way that our trainees have a clear understanding about developing layouts from schematics following the design constraints, process challenges and layout guidelines and verified their designs and extracted within the given specification limits.

Pane D

Lorem ipsum dolor sit amet, consectetuer adipiscing elit. Aenean commodo ligula eget dolor. Aenean massa.